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cisc

Renesas Technology Develops Future 32-bit RX600 Series CISC MCUs, Based on Renesas’ Next-Generation ‘RX’ Architecture

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Renesas Technology Corp. announced the development of the RX600 Series microcontrollers (MCUs), re-defining performance capabilities of CISC (Complex Instruction Set Computer)*¹ based MCUs. The new devices, scheduled for sample shipment in the second quarter of 2009, will be the first 32-bit products to incorporate the next-generation ‘RX’ CPU architecture and offer CPU performance of up to 200MHz, with the industry’s fastest single-cycle flash access capability (100MHz).

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Renesas enhances H8SX 32-bit CISC microcontroller family with network-oriented functions and up to 1 Megabyte Flash memory

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LONDON, UK 3rd March 2008 - Renesas Technology Europe announces enhancements to its H8SX family of 32-bit CISC (Complex Instruction Set Computer) microcontrollers with the addition of the H8SX/1658R and H8SX/1668R series. These two groups comprise products suitable for use in a wide variety of applications, including PC and office automation (OA) devices, digital consumer products, and industrial equipment. The H8SX/1658R and H8SX/1668R models are functionally enhanced versions of Renesas current H8SX/1653 and H8SX/1663 groups featuring an on-chip USB function. The addition of these new groups brings the total number of models in the H8SX family lineup to 26.

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Renesas redefines 32-bit CISC market with large on-chip RAM and Flash memory microcontrollers

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Embedded World 2008 26th February 2008 -- Renesas Technology Europe today announced the R32C/111 group of microcontrollers with on-chip flash memory and incorporating the R32C/100 high-performance 32-bit CPU core. The group consists of 12 models and is suitable for a wide range of applications, including metering, industrial and consumer electronics. The R32C/100 series is the top-level product series in the M16C Platform,*1 which is a CISC (Complex Instruction Set Computer) microcontroller. The core is upward compatible with existing CPU cores in the platform, and also provides improvements in operation processing performance, bus usage efficiency and code efficiency.

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